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Home » Komputer » Microcontroller of Von Neumann vs Havard and CISC vs RISC

Microcontroller of Von Neumann vs Havard and CISC vs RISC

Joni
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Saturday, September 27, 2014
Microcontroller of Von Neumann vs Havard and CISC vs RISC | pemprograman | komputer | bahasa python
Microcontroller is complete microprocessor system that is contained in a chip. Microcontroller is different with microprocessor which has all purpose used in a Personal Computer, because in a microcontroller as general also contain supporting components of microprocessor minimal systems, they are memory and interface I/O. in the other hand, in microprocessor as general only contain CPU. All microcontroller use one of two plan models named Havard and Von Neumann architecture. There are some differences of the two plan models, the differences of them can be seen from data exchange between CPU and memory.
  1. Von Neumann Architecture.

    Microcontroller that uses this architecture has only one block of memory and one data bus (8-bit). Because of all datas exchange using this 8 traffics, the bus will be overload, the communication will be very slow and not efficient. On the contrary, CPU can read instruction or read/write data from/to memory. Both of them will not be happened at same time because data and instruction using on same bus system. For example, if a program line command register memory RAM with named “SS” must be increased one (eg. Using instruction : inc SS), so microcotroller will do :
    1. Read part of program instruction that declares what does should be done (in this case is instruction “inc” for increasing command) ;
    2. Read further from this instruction that declares data which will be increased (in this case is register “SS”) ;
    3. After increased, capacity of this register must be wirtten again to previous register that have been read (register address “SS”).
    The same data bus is used for all of this operation.
  2. Havard Microcontroller

    Microcontroller that uses this architecture has two differerent busses. One bus (8-bits) and connecting CPU to RAM. This bus consist of some traffics (12, 14, and 16) and connecting CPU to ROM. So, CPU can read instruction and access data memory at same time. Because of all register memory RAM its width 8-bits, all data exchange in microcontroller using same format, so that as long as process of data writing execution, only 8-bits that attentioned. In other words, something that have to see when staking out program is width of data that either can be exchanged or processed only as wide as 8-bits. Program that made for some this microcontrollers will be saved in internal ROM (flash ROM) after compilated to machine language. This memory location is clarified on 12, 14,1 6-bits. Partly from bit, 4, 6, or 8-bit used as instruction itself and followed with data 8-bit. Strengths :
    • All datas in program as wide 1 byte (8-bits). Because of data bus used in program reader has some traffics (12, 14, or 16), instruction and data can be read all at once. So, all instructions can be executed only with one cycle instruction, except jumping instruction (jump) that executed in two cycles.
    • The fact that program (ROM) and temporary data (RAM) are separated, CPU can execute two instructions directly. It means that as long as process of reading and writing RAM (end of an instruction), the next instruction is read pass through other bus.
    • If microcontroller use Von Neumann architecture, we can’t know how many memories needed by some instrucions. The based, each program instructions need two memory locations (the one contain instruction what does should be done, the other one contain data information which will be processed).
    On microcontroller with Havard architecture, generally program bus has more than 1 byte, that permits each words contain instruction and data, it means that one word – one instruction.
  3. CISC vs RISC
    CISC
    RISC
    Emphasis on hardware Emphasis on software
    Including multi-clock complex instructions Single-clock, just small amount instructions
    Memory-to-memory : "LOAD" and "STORE" cooperate each other Register-to-register : "LOAD" and "STORE" are separate instructions
    Code size is small, slow speed Code size is big, high speed
    Transistor is used to store complex instructions Transistor common used for register memory
    Examples of CISC :
    • Processor system/360
    • Processor VAX
    • Processor PDP-11
    • CPU AMD
    • Intel x86
    • x86 or 80x86 is general name of microprocessor architecture that first time developed and produced by Intel. Architecture of x86 is dominating desktop computer, portable computer, and simple server market. This architecture known with name x86 because first processors from this architecture family has model number that ended by number sequences “86” : processor 8086, 80186, 80286, 386, 486.
    Example of RISC :
    • Computer Vector
    • Microprocessor Intel 960
    • Itanium (IA64) from Intel Corporation
    • Power PC from International Business Machine
    • ARM architecture is processor architecture 32-bits RISC that is developed by ARM limited. Known as Advanced RSIC where the previous known as Acorn RISC Machine. The first, it is desktop processor that dominated by x86 family now. But the simple design make ARM processor be compatible for application which low energy. This case make ARM processor dominate electronic mobile market and embedded system where needing low energy and cost.
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